Freescale Semiconductor /MK70F15 /DDR /CR20

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR20

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)LPRE 0CKSRE0CKSRX0 (WRMD)WRMD

LPRE=00

Description

DDR Control Register 20

Fields

LPRE

Low Power Refresh enable

0 (00): Refreshes occur

1 (01): Refreshes do not occur

CKSRE

Clock hold delay on self refresh entry

CKSRX

Clock Self Refresh Exit

WRMD

Write Mode Register

Links

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